MAX19707ETM+T【PDF 7/37 页】IC ANLG FRNT END 48-TQFN

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Sheet目录2009

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MAX19707

10-Bit, 45Msps, Ultra-Low-Power

Analog Front-End

______________________________________________________________________________________

PIN

NAME

FUNCTION

QAP

Channel-QA Positive Analog Input. For single-ended operation, connect signal source to QAP.

13–18, 21–24

D0–D9

Digital I/O. Outputs for receive ADC in Rx mode. Inputs for transmit DAC in Tx mode. D9 is the most

significant bit (MSB) and D0 is the least significant bit (LSB).

OGND

Output-Driver Ground

OVDD

Output-Driver Power Supply. Supply range from 1.8V to VDD. Bypass OVDD to OGND with a

combination of a 2.2F capacitor in parallel with a 0.1F capacitor.

SHDN

Active-Low Shutdown Input. Apply logic-low to place the MAX19707 in shutdown.

DOUT

Aux-ADC Digital Output

Transmit- or Receive-Mode Select Input. T/

R logic-low input sets the device in receive mode. A

logic-high input sets the device in transmit mode.

DIN

3-Wire Serial-Interface Data Input. Data is latched on the rising edge of the SCLK.

SCLK

3-Wire Serial-Interface Clock Input

3-Wire Serial-Interface Chip-Select Input. Logic-low enables the serial interface.

ADC2

Analog Input for Auxiliary ADC

ADC1

Analog Input for Auxiliary ADC

DAC3

Analog Output for Auxiliary DAC3

DAC2

Analog Output for Auxiliary DAC2

DAC1

Analog Output for Auxiliary DAC1 (AFC DAC, VOUT = 1.1V During Power-Up)

40, 41

IDN, IDP

DAC Channel-ID Differential Voltage Output

44, 45

QDN, QDP

DAC Channel-QD Differential Voltage Output

REFIN

Reference Input. Connect to VDD for internal reference. Bypass to GND with a 0.1F capacitor.

COM

Common-Mode Voltage I/O. Bypass COM to GND with a 0.33F capacitor.

REFN

Negative Reference I/O. Rx ADC conversion range is ±(VREFP - VREFN). Bypass REFN to GND with a

0.33F capacitor.

—

Exposed Paddle. Exposed paddle is internally connected to GND. Connect EP to the GND plane.

Pin Description (continued)

MICROWIRE is a trademark of National Semiconductor Corp.

Detailed Description

The MAX19707 integrates a dual, 10-bit Rx ADC and a

dual, 10-bit Tx DAC while providing ultra-low power

and high dynamic performance at a 45Msps conver-

sion rate. The Rx ADC analog input amplifiers are fully

differential and accept 1.024VP-P full-scale signals. The

Tx DAC analog outputs are fully differential with

±400mV full-scale output, selectable common-mode

DC level, and adjustable I/Q offset trim.

The MAX19707 integrates three 12-bit auxiliary DAC

(aux-DAC) channels and a 10-bit, 333ksps auxiliary

ADC (aux-ADC) with 4:1 input multiplexer. The aux-DAC

channels feature 1s settling time for fast automatic

gain-control (AGC), variable-gain amplifier (VGA), and

automatic frequency-control (AFC) level setting. The

aux-ADC features data averaging to reduce processor

overhead and a selectable clock-divider to program the

conversion rate.

The MAX19707 includes a 3-wire serial interface to

control operating modes and power management. The

serial interface is SPI and MICROWIRE compatible.

The MAX19707 serial interface selects shutdown, idle,

standby, transmit (Tx), and receive (Rx) modes, as well

as controls aux-DAC and aux-ADC channels.

The Rx ADC and Tx DAC share a common digital I/O to

reduce the digital interface to a single, 10-bit parallel

multiplexed bus. The 10-bit digital bus operates on a

single 1.8V to 3.3V supply.

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